Notes from the PCBWay Assembly Floor: Header Pins, JST Footprints, and Switch Jumper Routing
Passing local Design Rule Checks (DRC) in KiCad is a satisfying milestone, but it is not the same thing as passing physical assembly on the factory floor.
Shortly after we submitted our initial 4-layer calculator mainboard (calculator.kicad_pcb), BOM (bom.csv), and pick-and-place centroid files to PCBWay for turnkey SMT and through-hole assembly, their engineering team paused the line and sent back a set of real bench inspection photos. Those photos caught four physical integration bugs that a software DRC never flags: through-hole MCU header pins colliding with a front-side tactile switch, a through-hole JST battery header paired with undrilled surface-mount pads, mirrored silkscreen layers, and implicit jumper connections across the 4-pad tactile switches.
Here is what the PCBWay team found on the bench and how we fixed the board layout and jumper routing with Python scripts in KiCad's pcbnew API.